Code generation in Engee
Course description
In the course Code Generation in Engee you will learn how to generate code from Engee models and subsystems in C and Verilog languages, verify the generated code using the C Function block usage, explore the Engee code generator options, ways to integrate code into an external development environment, and features of code generation for finite automata.
Each section contains a theoretical part, practical examples and tasks for self-completion.
Knowledge requirements: completion of courses Welcome to Engee and Visual modeling.
Total course time: ~3 hours.
Course program
Generating C code from Engee models
The generation of C code through the graphical interface Engee, internal functions and parameters in the generated code, description of generated files, integration into the external development environment, supported data types, multi-frequency models, comments in the generated code, control of signal names are studied.
Code generation via command line and interactive script
Code generation using the command is being studied engee.generate_code() On the command line or in the script editor, examples of code generation for the smoothing low-pass filter model and the autopilot control system model are considered.
Code verification
Code verification is being studied, which includes generating a script with Engee software control commands and creating a verification model with a C Function block containing the generated C code.
Code generation for finite automata
General information about finite automata is given, the features of code generation for finite automata are studied, an example of code generation for a blinking LED model on finite automata and the launch of the generated code on the STM32 microcontroller are considered.
Verilog Code generation
General information about the Verilog language is given, the features of generating Verilog-code for Engee models, the capabilities of the Verilog-code generator, Verilog-code verification are studied, an example of generating Verilog-code for the PID controller model is considered, an overview of how to work with Verilog from the inside.