Engee documentation

Support package for managing the RITM SDR USRP hardware platform

The article contains information necessary for use in Engee libraries Targets.RITM_SDR_API designed for remote control of the RITM SDRfootnote hardware platform:[SDR (Software Defined Radio) is a software—defined radio.] USRP[1] and data exchange over an Ethernet network. The requirements for the runtime environment, the connection procedure, the description of the application programming interface (API) and the register map of the main IP cores are given. note:[IP core is a hardware functional module within the FPGA/SNC, accessible by address space.].

Purpose and conditions of use

Library Targets.RITM_SDR_API It is designed to control the RITM SDR USRP hardware platform based on the Xilinx Zynq UltraScale+ system-on-chip and the ADRV9009 RF transceiver. Management is carried out through network interaction with the RITM SDR USRP control module. The SDR USRP RITM provides operation in the range of 75 MHz – 6 GHz with an instantaneous band up to 450 MHz. Library Targets.RITM_SDR_API It is used in the development, debugging and testing of wireless communication and radar systems.

General information

Library Targets.RITM_SDR_API implements a set of strongly typed Julia language methods and macros for performing the following operations:

  • establishing and terminating a TCP connection with the RITM SDR USRP control module;

  • setting radio frequency and path parameters (frequency, attenuation, TX/RXfootnote modes:[TX /RX — transmission/reception channels.]);

  • performing IP core reset and management procedures;

  • transmission and reception of I/Q samples and service data.

Interaction with the RITM SDR USRP is performed through Engee Device Manager. The diagram of the component interaction is shown in the figure.

ritm sdr usrp

Execution conditions

For the library to work Targets.RITM_SDR_API required:

  • RITM SDR USRP access to an Ethernet network;

  • availability Engee Device Manager on the side of the control computer (when used according to the accepted architecture).

Default Network settings:

  • IP address: SDR USRP — 192.168.2.70;

  • TCP port — 12345.

Quick start

  1. Install or connect the Engee subsystem.Integration as shown in article.

    engee.package.install("Engee-Device-Manager")
    Connection link: engee.com/prod/user/demo1234-user
    Install the client program:
    https://dl.kpm-ritm.ru/repo/Host-Device-Manager-v1.57-Windows.zip - For Windows
    https://dl.kpm-ritm.ru/repo/Host-Device-Manager-v1.57-Linux.zip - For Linux
    To get examples, run: engee.package.getdemos("Engee-Device-Manager")
    To run the server program, run: engee.package.start("Engee-Device-Manager")
    The 'Engee-Device-Manager' support package, version 'v1.57', has been successfully installed.
    engee.package.start("Engee-Device-Manager")
    "engee.com/prod/user/demo1234-user"
  2. Use the commands:

    using Main.EngeeDeviceManager.Targets.RITM_SDR_API
    import Main.EngeeDeviceManager.Targets.RITM_SDR_API
    
    client = RITM_SDR_API.RITMClient("192.168.2.70")
    if !RITM_SDR_API.connect(client)
        println("Connection error")
        return
    end
    println("Server version: $(RITM_SDR_API.get_version(client))")
    RITM_SDR_API.disconnect(client)

    An example of the expected output to the console:

    Connected to 192.168.2.70:12345
    Server version: v5.1.5
    Connection closed

For more information, see the article Getting started with the RITM SDR USRP

Application Programming Interface (API)

This section describes the macros and functions of the library. For each item, the name, prototype (if available in the source text) and purpose are indicated.

Logging Group

Name The prototype Appointment

@log

macro log(expr)

A macro for «quiet» logging without output to the console. Records data only if LOG_ENABLED[] = true.

@log_on

macro log_on()

The main switch of the logging system. Sets a global variable LOG_ENABLED[] = true. When calling functions for the first time @logmsg or @log It starts automatically _ensure_log_file(), which creates a folder logs (if there is none) and initializes the file with a timestamp in the name. A confirmation is displayed in the console.

@logmsg

macro logmsg(expr)

The main macro for combined output. Converts the expression to a string, clears it, prints it to the console, and if logging is active, writes it to a timestamped log file.

Example: @logmsg "Temperature: $(temp)°C"

@logprint

macro logprint(expr)

Prints a message to the console without a newline. It is used for interactive progress bars or displaying partial results in one line.

close_log()

function close_log()

Logging session ends correctly. Adds a final entry, creates a cleaned-up version of the log file, and resets global variables.

Service functions

Name The prototype Appointment

RITMClient()

RITMClient(server_ip::String="192.168.2.70")

Constructor of the main library object. Creates a structure with the following fields: the IP address of the control module, the TCP connection descriptor, and the sampling rate (by default).

_clean_string()

_clean_string(s::String)::String

Clearing string responses from the control module of control and non-printable characters.

_clear_socket_buffer()

_clear_socket_buffer(socket::SOCKET.Socket)

Clearing the input buffer of the network socket.

_get_data()

_get_data(client::RITMClient)::Union{Vector{UInt8}, Nothing}

Receiving binary data from the control module according to the established protocol.

_put_data()

_put_data(client::RITMClient, data::Vector{UInt8})::Bool

Sending binary data to the control module using the established protocol.

_send_command()

_send_command(client::RITMClient, command::String)::Tuple{Bool, Union{String, Nothing}}

A key low-level function for sending commands to the control module. Sends a command, waits for processing, reads and analyzes the response.

disconnect()

disconnect(client::RITMClient)

Secure disconnection.

connect()

connect(client::RITMClient)::Bool

Establishing a TCP connection with the control module. The port is fixed — SDR_PORT = 12345.

Managing basic parameters

Name The prototype Appointment

get_calibrate_status()

get_calibrate_status(client::RITMClient)::String

Request the calibration status of the system.

get_frequency()

get_frequency(client::RITMClient)::Float64

Request for the current frequency.

get_rx_attenuation()

get_rx_attenuation(client::RITMClient, rx::String)::Union{Int, Nothing}

Request for a tabular value of receiver attenuation.

get_rx_power()

get_rx_power(client::RITMClient, rx::String)::Union{Float64, Nothing}

Measuring the power at the receiver input.

get_transceiver_state()

get_transceiver_state(client::RITMClient)::Tuple{Int, Int}

Request for the current status of the transceiver.

get_tx_attenuation()

get_tx_attenuation(client::RITMClient, tx::String)::Union{Float64, Nothing}

Request for transmitter attenuation.

set_frequency()

set_frequency(client::RITMClient, freq_mhz::Float64)::Bool

Setting the carrier frequency of the transmitter and receiver. Checks the range, sends a command COMMAND: SET_TX_CARR_FREQ_HZ.

set_param()

set_param(client::RITMClient, param::String)::Bool

Universal parameter setting.

set_rx_attenuation()

set_rx_attenuation(client::RITMClient, rx::String, value::Int)::Bool

Setting the tabular value of receiver attenuation.

set_transceiver()

set_transceiver(client::RITMClient, tx_cmd::Int, rx_cmd::Int)::Bool

Configuration of the transmitter and receiver channels using bit masks.

set_tx_attenuation()

set_tx_attenuation(client::RITMClient, tx::String, atten_db::Float64)::Bool

Setting the attenuation of the transmitter.

set_tx_carrier_freq_hz()

set_tx_carrier_freq_hz(client::RITMClient, freq_hz::Int)::Bool

Alternative frequency setting in Hz.

stop_transmission()

stop_transmission(client::RITMClient)::Bool

Stopping the transmission.

Advanced control and reset functions

Name Appointment

get_ip_core()

Reading the register of the functional module (IP core).

reset_DFE_system_FIFO_TX491()

FIFOfootnote Target reset:[FIFO is a First In, First Out queue.] in the DFE system.

reset_KG()

Resetting the auxiliary noise generator unit.

reset_RX_DMA()

Resetting DMA Controllers note:[DMA (Direct Memory Access) — Direct memory access controller.] reception and transmission.

reset_TX_DMA()

Resetting the receiving and transmitting DMA controllers.

reset_buffers()

Comprehensive FIFO buffer reset.

set_ip_core()

Writing to the register of the functional module (IP core).

RF switches

Name The prototype Appointment

manual_calibrate_orx()

manual_calibrate_orx(client::RITMClient, orx::String)::Bool

Manual calibration of the feedback channel.

rf_switch_set_trx_sw1()

rf_switch_set_trx_sw1(client::RITMClient, value::Bool)::Bool

RF switching control on a hardware platform.

rf_switch_set_trx_sw2()

rf_switch_set_trx_sw2(client::RITMClient, value::Bool)::Bool

RF switching control on a hardware platform.

rf_switch_set_tx_bandsel_a()

rf_switch_set_tx_bandsel_a(client::RITMClient, value::Bool)::Bool

RF switching control on a hardware platform.

rf_switch_set_tx_bandsel_b()

rf_switch_set_tx_bandsel_b(client::RITMClient, value::Bool)::Bool

RF switching control on a hardware platform.

rf_switch_set_tx_fddtdd_sw1()

rf_switch_set_tx_fddtdd_sw1(client::RITMClient, value::Bool)::Bool

RF switching control on a hardware platform.

rf_switch_set_tx_fddtdd_sw2()

rf_switch_set_tx_fddtdd_sw2(client::RITMClient, value::Bool)::Bool

RF switching control on a hardware platform.

set_tx_data_duplicate()

set_tx_data_duplicate(client::RITMClient, enable::Bool)::Bool

Enabling/disabling the duplication of transmitter data for MIMO modes.

Data reception and transmission management

Name Appointment

get_orx_attenuation()

Channel Attenuation Management ORX[2].

is_ORX_DMA_transfer_end()

Checking the completion of the DMA transmission for the main reception (RX) and feedback channels (ORX).

is_dma_transfer_end()

Checking the completion of the DMA transmission for the main reception (RX) and feedback channels (ORX).

parse_rx_data()

Formatting received data from uint32 into an array of complex numbers.

prepare_tx_data()

Preparing complex data for transmission: scaling and interleaving of components.

receive_file_ORX_to_RAM()

Receiving data from the feedback channel (ORX) into RAM.

receive_to_ram()

Initiates receiving data from the receiver into RAM.

receiver_RX_ORX_ONOFF()

Direct switching on/off of receiving channels.

send_to_ram()

The command to transfer data from RAM to the transmitter.

set_orx_attenuation()

ORX channel attenuation management.

Additional service functions

Name Appointment

get_temperatures()

Temperature monitoring of various components of the hardware platform.

get_version()

Request the software version of the control module.

Automatic gain control functions

Name The prototype Appointment

agc_set_mode()

agc_set_mode(client, mode)

Configuration of automatic gain control (0 — off, 1 — slow, 2 — fast, 3 — hybrid).

agc_parse_config()

agc_parse_config(client)

Force the automatic gain control settings to be applied after they have been changed.

agc_reset()

agc_reset(client)

Reset the automatic gain control settings to the default values.

set_tx_data_duplicate()

set_tx_data_duplicate(client, enable)

Enabling/disabling the duplication of transmitter data for MIMO modes.

Networking and data exchange

The connection to the control module of the product is established via TCP protocol. The port number is fixed (12345). Function connect() it must be called before executing any control and data exchange commands. Breaking the connection is performed by the function disconnect() (or close(), if a synonym is used). Sending control commands is implemented through a low-level function _send_command(), which transmits a string command and analyzes the response. The transmission and reception of binary data arrays are performed by the functions _put_data() and _get_data() according to the established exchange protocol.

SDR Registers

The table shows the register map of IP cores available through the mechanism. set_ip_core()/get_ip_core(). Addresses are given in hexadecimal format. The data types are given in accordance with the designations used in the FPGA project.

IP Core Address (hex) Register Name Data Type Description

DUCex[3]

0x30108

IPCore_Reset

boolean

Core Reset: Write 0x1 resets the IP core.

DUCex

0x30008

IPCore_Timestamp

uint32

The unique time stamp of the core (format yymmddHHMM).

DUCex

0x30100

rate_axi_Data

ufix12

The data register for setting the interpolation coefficient.

DUCex

0x30104

rate_enb_axi_Data

boolean

Turning the interpolator on/off.

DUCex

0x30108

rst_axi_Data

boolean

Asynchronous core reset via AXI.

DUCex

0x3010C

enb_axi_Data

boolean

Global core activation.

DUCex

0x30110

gain_0_correct_axi_Data

ufix12_En10

Channel gain factor 0 (correction).

DUCex

0x30114

gain_0_enb_axi_Data

boolean

Enabling channel 0 gain.

DUCex

0x30118

gain_1_correct_axi_Data

ufix12_En10

Channel 1 gain (correction).

DUCex

0x3011C

gain_1_enb_axi_Data

boolean

Enabling channel 1 gain.

DUCex

0x30120

nco_0_enb_axi_Data

boolean

Enabling NCO[4] channel 0.

DUCex

0x30124

nco_0_phase_inc_Data

DUC_phase_inc

NCO Channel phase increment 0 (int32).

DUCex

0x30128

nco_0_phase_offset_Data

DUC_phase_offset

The phase offset of the NCO channel is 0 (int32).

DUCex

0x3012C

nco_0_reset_accum_Data

boolean

Resetting the NCO phase drive of channel 0.

DUCex

0x30130

nco_1_phase_inc_Data

DUC_phase_inc

NCO phase increment of Channel 1 (int32).

DUCex

0x30134

nco_1_phase_offset_Data

DUC_phase_offset

NCO phase offset of channel 1 (int32).

DUCex

0x30138

nco_1_reset_accum_Data

boolean

Reset the NCO phase drive of channel 1.

DUCex

0x3013C

nco_1_enb_axi_Data

boolean

Enabling NCO channel 1.

DUCex

0x30140

DDS_0_on_Data

boolean

Enabling DDS[5] channel 0.

DUCex

0x30144

DDS_1_on_Data

boolean

Enabling DDS channel 1.

DDCex

0x50108

IPCore_Reset

boolean

Core Reset: Write 0x1 resets the IP core.

DDCex

0x50008

IPCore_Timestamp

uint32

The unique time stamp of the core (format yymmddHHMM).

DDCex

0x50100

rate_axi_Data

ufix12

The data register for setting the decimation coefficient.

DDCex

0x50104

rate_enb_axi_Data

boolean

Switching on/off the decimator.

DDCex

0x50108

rst_axi_Data

boolean

Asynchronous core reset via AXI[6].

DDCex

0x50110

gain_0_correct_axi_Data

ufix12_En10

Channel gain factor 0 (correction).

DDCex

0x5010C

gain_1_correct_axi_Data

ufix12_En10

Channel gain factor 1 (correction).

DDCex

0x50114

gain_0_enb_axi_Data

boolean

Enabling channel 0 gain.

DDCex

0x50118

gain_1_enb_axi_Data

boolean

Enabling channel 1 gain.

DDCex

0x50124

nco_0_phase_inc_Data

DDC_phase_inc

The increment of the NCO phase of the channel is 0.

DDCex

0x50128

nco_0_phase_offset_Data

DDC_phase_offset

The phase offset of the NCO channel is 0.

DDCex

0x5012C

nco_0_reset_accum_Data

boolean

Resetting the NCO phase drive of channel 0.

DDCex

0x50130

nco_1_phase_inc_Data

DDC_phase_inc

The increment of the NCO phase of channel 1.

DDCex

0x50134

nco_1_phase_offset_Data

DDC_phase_offset

The NCO phase offset of channel 1.

DDCex

0x50138

nco_1_reset_accum_Data

boolean

Reset the NCO phase drive of channel 1.

DDCex

0x50120

nco_0_enb_axi_Data

boolean

Enabling the NCO of the common output.

DDCex

0x5013C

nco_1_enb_axi_Data

boolean

Enabling NCO channel 1.

DDCex

0x50154

DDS_0_on_Data

boolean

Enabling DDS channel 0.

DDCex

0x50158

DDS_1_on_Data

boolean

Enabling DDS channel 1.

DDCex

0x5011C

high_level_0_Data

int16

DDCex

0x50140

inc_val_0_Data

sfix16_En15

DDCex

0x50144

dec_val_0_Data

sfix16_En15

DDCex

0x50148

low_level_0_Data

int16

DDCex

0x5014C

enb_dc_correct_0_Data

boolean

DDCex

0x50150

high_level_1_Data

int16

DDCex

0x5015C

inc_val_1_Data

sfix16_En15

DDCex

0x50160

dec_val_1_Data

sfix16_En15

DDCex

0x50164

low_level_1_Data

int16

DDCex

0x50168

enb_dc_correct_1_Data

boolean

DDCex

0x5016C

integrate_0_out_Data

int32

DDCex

0x50170

integrate_1_out_Data

int32

AGCex[7]

0x80120000

IPCore_Reset

boolean

Core Reset: Write 0x1 resets the IP core.

AGCex

0x80120004

IPCore_Enable

boolean

Enabling the kernel (enabled by default when bit 0 is equal to 0x1).

AGCex

0x80120008

IPCore_Timestamp

uint32

The unique time stamp of the core (format yymmddHHMM): 2509100147.

AGCex

0x80120100

time_out_Data

ufix25

The data register for the input port time_out.

AGCex

0x80120104

thrshld_Data

sfix18_En17

The data register for the input port thrshld.

AGCex

0x80120108

target_avg_delta_high_Data

ufix18_En17

The data register for the input port target_avg_delta_high.

AGCex

0x8012010C

target_avg_Data

ufix18_En17

The data register for the input port target_avg.

AGCex

0x80120110

prg_rst_Data

boolean

The data register for the input port prg_rst.

AGCex

0x80120114

avg_timer_pow2_Data

uint8

The data register for the input port avg_timer_pow2.

AGCex

0x80120118

over_hi_dec_step_Data

sfix18_En17

The data register for the input port over_hi_dec_step.

AGCex

0x8012011C

normal_dec_step_Data

sfix18_En17

The data register for the input port normal_dec_step.

AGCex

0x80120120

normal_inc_step_Data

sfix18_En17

The data register for the input port normal_inc_step.

AGCex

0x80120124

normal_gain_Data

ufix18_En12

The data register for the input port normal_gain.

AGCex

0x80120128

hi_criteria_Data

ufix17_En17

The data register for the input port hi_criteria.

AGCex

0x8012012C

hi_criteria_timer_Data

uint8

The data register for the input port hi_criteria_timer.

AGCex

0x80120130

agc_enb_Data

boolean

The data register for the input port agc_enb.

AGCex

0x80120134

b_in_Data

ufix18_En18

The data register for the input port b_in.

AGCex

0x80120138

max_detected_Data

sfix16_En15

The data register for the output port max_detected.

AGCex

0x8012013C

avg_data_clear_Data

ufix12_En7

The data register for the output port avg_data_clear.

AGCex

0x80120140

avg_data_iir_Data

ufix18_En17

The data register for the output port avg_data_iir.

AGCex

0x80120144

current_ku_Data

ufix18_En12

The data register for the output port current_ku.

AGCex

0x80120148

overhi_enb_valid_out_Data

boolean

The data register for the output port.


1. USRP (Universal Software Radio Peripheral) — Universal SDR platform.
2. ORX (Observation Receiver) — feedback channel.
3. DUC/DDC (Digital Up/Down Converter) is an up/down digital converter.
4. NCO (Numerically Controlled Oscillator) is a numerically controlled generator.
5. DDS (Direct Digital Synthesis) is a digital synthesizer.
6. AXI — AMBA AXI bus interface.
7. AGC (Automatic Gain Control) — Automatic gain control.