Synchronization with external signals and GPSDO

By default, the PLL, which clocks the PL blocks associated with JESD, works in the mode holdover, i.e. without synchronization by an external reference signal. For synchronization with external devices, a mode is provided in which a reference signal of 10 or 48 MHz is applied to the input REF IN, the PLL exits the mode holdover and it synchronizes the phase of the output clock signal by the input. Also, the RITM SDR USRP provides a REF OUT output of the reference synchronized frequency of 48 MHz for synchronization of other devices.

Thus, synchronous operation of several devices using a reference clock signal is possible.