Dual Modulus Prescaler
An integer clock frequency divider with two division coefficients.
blockType: SubSystem
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Path in the library: |
Description
Block Dual Modulus Prescaler It consists of a command counter, a counter of "swallowed" signals and a preliminary frequency divider.
When the input signal is received for the first time, the pulse absorption function is activated. The pre-divider divides the frequency of the input signal by , where defined by the parameter Prescaler divider value, N. The counters of commands and "swallowed" signals start counting down. The counter of "swallowed" signals is reset after counting pulses or cycles where defined by the parameter Swallow counter value, S. Then the pulse absorption function is deactivated, and the pre-divider divides the input frequency by .
Because the command counter has already recognized He needs more pulses. pulses or cycles to achieve overflow, where defined by the parameter Program counter value, P. The cycle repeats after both counters are reset.
The effective value of the divider of the two-module pre-divider is equal to the ratio of the input frequency to the output frequency:
| In order to prevent premature resetting of the command counter and the pre-divider of the frequency before the counter of "swallowed" signals finishes counting, the condition must be observed . |
A two-module pre-divider is also known as a pulse divider.
Ports
Input
#
clk in
—
input clock frequency
scalar
Details
The input clock frequency, set as a scalar. In the phase-locked frequency (PLL) system, the clk in port is connected to the output port of the unit Ring Oscillator VCO.
| Data types |
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| Complex numbers support |
I don’t |
Output
#
clk out
—
Output clock frequency
scalar
Details
The output clock frequency, expressed as a scalar. In the PLL system, the clk out port is connected to the feedback Input of the unit PFD. The output signal of the clk out port is a sequence of rectangular pulses with an amplitude of 1 V.
| Data types |
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| Complex numbers support |
I don’t |
Parameters
Parameters
# Program counter value, P — maximum value of the command counter
Details
The maximum value of the command counter, set as an integer scalar. The counter is reset after - cycles. This parameter can be customized.
| Default value |
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| Program usage name |
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| Tunable |
No |
| Evaluatable |
Yes |
# Prescaler divider value, N — the value of the preliminary divisor
Details
The value of the tentative divisor, set as an integer scalar. Two-module preliminary divider divides the input frequency by or , depending on the logical state of the control line of the module. This parameter is configurable.
| Default value |
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| Program usage name |
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| Tunable |
No |
| Evaluatable |
Yes |
# Swallow counter value, S — the maximum value of the counter of "swallowed" signals
Details
The maximum value of the counter of "swallowed" signals, set as an integer scalar. When the counter is reset after -cycles, the pulse swallowing function is deactivated.
| Default value |
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| Program usage name |
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| Tunable |
No |
| Evaluatable |
Yes |
More detailed
Inside the mask
Details
Block Dual Modulus Prescaler It consists of three different subsystems that implement the three main parts of a two-module frequency divider. The pre-divider divides the input frequency by or , depending on the logical state of the control line of the module. The instruction counter subsystem always divides the output frequency of the frequency pre-divider by .
The counter of "swallowed" signals divides the output frequency of the pre-divider by . Meaning depends on the digital input and may vary from 1 up to the maximum number of channels. Meaning It also determines the logical state of the control line of the module.