Engee documentation

Bit Concat

Combines up to 16 input words into one output.

blockType: Bit Concat

Path in the library:

/Basic/Logic and Bit Operations/Bit Concat

Description

Block Bit Concat combines up to 16 input words into one output. The input port L denotes the low-order input word. Input port H denotes the highest input word. For scalar Inputs, two or more input signals must be connected to the unit. For vector Inputs, at least one Input must be connected to the unit. The order of the words in the output from right to left repeats the order of the input words from the youngest to the oldest. For more information about how the block works, see the Algorithms section.

Ports

Output

# OUT_1 — combined output word
scalar | vector | the matrix

Details

The output is a combined word, arranged in order from the lowest to the highest value of the input words. The maximum output word size is 16 bits.

Data types

Int8, Int16, Int32, Int64, Int128, UInt8, UInt16, UInt32, UInt64, UInt128, Bool, Fixed

Complex numbers support

Yes

Input

# H — the highest input word
scalar | vector | the matrix

Details

The highest word at the input of the block, which becomes the leftmost value in the combined output signal.

Data types

Int8, Int16, Int32, Int64, UInt8, UInt16, UInt32, UInt64, Bool, Fixed

Complex numbers support

Yes

# L — the minor input word
scalar | vector | the matrix

Details

The lowest word at the input of the block, which becomes the rightmost value in the combined output signal.

Data types

Int8, Int16, Int32, Int64, UInt8, UInt16, UInt32, UInt64, Bool, Fixed

Complex numbers support

Yes

Parameters

Main

# Number of Inputs — number of input signals
Int64 integer

Details

The number of input signals as a positive integer. The number of input ports on the block icon is updated when the value of the parameter Number of Inputs it’s changing. Minimum number of signals — 1, maximum — 16.

Make sure that the value Number of Inputs It is equal to the number of signals that are connected to the block. If the block has unconnected inputs, an error will occur when generating the code.
Default value

2

Program usage name

numInputs

Tunable

No

Evaluatable

Yes

Algorithms

The principle of operation of the unit depends on the number and size of the Inputs:

  • One input port: A scalar or vector arrives at the input port. If the input signal is a vector, the code generator combines the individual elements of the vector. For example, if the input vector is [1 2] with the data type UInt8, the output combines the elements 1 and 2 such that 1 forms the most significant bit (MSB). At the output we get a scalar of the type UInt16 with bit representation 0000000100000010 = 258.

  • Two input ports: Any combination of scalars and vectors arrives at the input port.

    • If a scalar arrives at one input port and a vector arrives at the other, then the code generator performs scalar expansion. Each element of the vector is combined with a scalar, and the output is a vector of the same dimension as the vector at the Input. For example, consider the vector [1 2], supplied to the Input of port H, and a scalar value 3, supplied to the Input of port L. Both Inputs have a data type UInt8. The output is a vector with the data type UInt16 which is combined in such a way that the most significant bit is the union of the elements 1 and 3, and the least significant bit is the union of elements 2 and 3.

    • If both input ports receive vectors, they must have the same size. In this case, the last element is the minor word and the first element is the major word. For example, consider two input vectors [1 2] and [3 4] which have a data type UInt8. The output is a vector with the data type UInt16 which is combined in such a way that the most significant bit is the union of the elements 1 and 3, and the least significant bit is the union of elements 2 and 4.

  • Three or more input ports (maximum 16): A scalar or vector arrives at the input port. All vector Inputs must have the same size. For example, consider three vector Inputs [1 2], [3 4] and [5 6], such that the vector [1 2] is the Input to port H, and [5 6] — to port L. In this case, the output is a vector that first combines [1 2] and [3 4]. The result of this calculation is then combined with the vector [5 6].

Additional options

C code generation: Yes