Advance compensator-delays in discrete or continuous time.
blockType: SubSystem
Path in the library:
/Physical Modeling/Electrical/Control/General Control/Lead-Lag (Discrete or Continuous)
Description
Block Lead-Lag (Discrete or Continuous) implements an advance-delay compensator in accordance with the IEEE 421.5-2016 standard [1].
You can switch between continuous and discrete block implementations using the parameter Sample time (-1 for inherited).
The equations of the advance-delay compensator
notable mode
To set the compensator for continuous operation, set the parameter Sample time (-1 for inherited) meaning 0. This representation is equivalent to a continuous transfer function.
where
— advance time constant;
— the delay time constant.
From the above transfer function follows a system of equations that defines the compensator:
where
— the input signal of the unit;
— block status;
— the output signal of the unit;
— simulation time;
— the initial value of the input signal of the block.
discret mode
To set the compensator to work in discrete mode, set the parameter Sample time (-1 for inherited) positive non-zero value or value −1 to inherit the sampling period from a higher-level block. The discrete representation is equivalent to the transfer function
where
— advance time constant;
— delay time constant;
— the sampling period.
Based on the discrete transfer function, the compensator equations are determined using the direct Euler method:
where
— the input signal of the unit;
— block status;
— the output signal of the unit;
— time step of the simulation;
— the initial value of the input signal of the block.
Determining the initial conditions
The initial conditions of the block can be set using the parameter Initialization. Set the value:
Inherited from block input — the unit will set the initial conditions of the status and output signal equal to the initial input value;
Specify as parameter — the block will set the initial condition of the state equal to the value of the parameter Initial state.
Limitation of the integral
Set the final values for the parameters Upper saturation limit and Lower saturation limit to use the saturation-protected restriction method («anti-windup»).
The saturation protection method limits the state of the compensator between the lower saturation limit and the upper limit of saturation :
Since the state is limited, the output signal can immediately respond to a change in the sign of the input signal when the integrator is saturated.
This block does not support the integral saturation method («windup»). To use this method, set the parameter Upper saturation limit meaning Inf, and for the parameter Lower saturation limit meaning −Inf and connect the unit Saturation to the output signal.
Ignoring the dynamics of the compensator
Set the delay time constant to zero or the advance time constant to ignore the dynamics of the compensator. In this case, the input signal is applied directly to the output:
In continuous mode, the sampling period and at least one of the time constants must be zero.
The delay time constant of the compensator. Set this value to 0 or the parameter value Lead time constant T1.
Default value
0.1
Program usage name
T2
Evaluatable
Yes
#Upper saturation limit —
upper limit of the condition
Details
The upper limit of the compensator condition. Set the value Inf for an unsaturated upper limit or a finite value to prevent overflow of the upper limit of the system integrator.
Default value
Inf
Program usage name
upper_saturation_limit
Evaluatable
Yes
#Lower saturation limit —
the lower limit of the condition
Details
The lower limit of the compensator condition. Set the value −Inf for an unsaturated lower limit or a finite value to prevent overflow of the lower limit of the system integrator.
Default value
-Inf
Program usage name
lower_saturation_limit
Evaluatable
Yes
#Initialization —
the method of setting the initial state
Inherited from block input | Specify as parameter
To use this parameter, set for the parameter Initialization meaning Specify as parameter.
Default value
0.0
Program usage name
initial_state
Evaluatable
Yes
#Sample time (-1 for inherited) —
block sampling period
Details
The time between consecutive block executions. During execution, the block generates output signals and, if necessary, updates its internal state.
For the inherited discrete time mode, set this parameter to −1. For discrete mode, set this parameter to a positive integer. For continuous mode, set this parameter to 0.
Default value
-1
Program usage name
sample_time
Evaluatable
Yes
Literature
IEEE Recommended Practice for Excitation System Models for Power System Stability Studies. IEEE Std 421.5-2016. Piscataway, NJ: IEEE-SA, 2016.