Zero-Order Hold

Delay the signal by one calculation step.

zero order hold

Description

The Zero-Order Hold block stores the value on the input during the specified calculation step. If the input signal is a vector, the block holds all elements of the vector for the same sampling period.

The calculation step is specified by the Sample time parameter. The value -1 means that the block inherits the value of the calculation step.

Do not use the Zero-Order Hold block to create a transition between blocks operating at different sampling rates (from fast to slow). Instead, use the block Rate Transition.

Comparison with similar units

The Memory, Unit Delay and Zero-Order Hold blocks provide similar functionality but have different features. In addition, the purpose of each block is different.

The table shows the recommended usage for each block.

Block	Block Purpose
Unit Delay	Realises the delay using the specified calculation step. The block receives and outputs signals with a discrete calculation step.
Memory	Realises the delay using one basic calculation step. Ideally, the block accepts continuous (or fixed with a small time step) signals and outputs a signal that is fixed with a small time step.
*Zero-Order Hold.	Converts a continuous input signal to a discrete signal.

Block

Block Purpose

Unit Delay

Realises the delay using the specified calculation step. The block receives and outputs signals with a discrete calculation step.

Memory

Realises the delay using one basic calculation step. Ideally, the block accepts continuous (or fixed with a small time step) signals and outputs a signal that is fixed with a small time step.

*Zero-Order Hold.

Converts a continuous input signal to a discrete signal.

Each unit has the following capabilities.

Capability Memory Unit Delay Zero-Order Hold

Capability	Memory	Unit Delay	Zero-Order Hold
Initial condition setting	Yes	Yes	No, because the block output at time `t = 0` must be equal to the input value.
Setting the calculation step	No, because the block can only inherit the calculation step from the control block or solver used for the whole model.	Yes	Yes
Support for frame-based signals	No	Yes	Yes
Support for status logging	No	Yes	No

Initial condition setting

Yes

No, because the block output at time t = 0 must be equal to the input value.

Setting the calculation step

No, because the block can only inherit the calculation step from the control block or solver used for the whole model.

Yes

Support for frame-based signals

Yes

Support for status logging

Yes

Ports

Input

Port_1 - input signal
scalar | vector

The input signal that the block holds for one calculation step.

Data types: Float16, Float32, Float64, Int8, Int16, Int32, Int64, UInt8, UInt16, UInt32, UInt64, Bool.

Support for complex numbers: Yes

Output

Port_1 - output signal
scalar | vector

Output signal, i.e. the input signal held for one calculation step.

Data types: Float64.

Parameters

Sample time (-1 for inherited) - interval between calculation steps
-1.0 (by default) | scalar

Specify the interval between calculation steps as a non-negative number. To inherit a calculation step, set this parameter to -1.

Do not specify a continuous calculation step (0). This block supports only discrete calculation step. When this parameter is -1, the inherited calculation step must be discrete, not continuous.