Unit Delay
Delays the signal by one calculation step.
Description
Block Unit Delay delays input for the specified calculation step. When placed in an iterator subsystem, it delays input for one iteration. This block is equivalent to the discrete-time operator . The block takes one input signal and generates one output signal. Each signal can be scalar or vector. If the input signal is a vector, the block delays all elements of the vector for the same computation step.
The output of the block for the first time step is given by the parameters Initial condition. Correct selection of this parameter can minimise undesirable behaviour of the output signal. The calculation step is set by the Sample time parameters. The value -1 means that the block inherits the value of the calculation step.
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The block will generate an error if you use it to create a transition between blocks operating at different sampling rates. Instead, use the block Rate Transition. |
Comparison with similar blocks
The Memory, Unit Delay, and Zero-Order Hold blocks provide similar functionality, but have different features. In addition, the purpose of each block is different.
The table shows the recommended usage for each block.
| Block | Block Purpose |
|---|---|
Unit Delay |
Realises the delay using the specified calculation step. The block receives and outputs signals with a discrete calculation step. |
Realises the delay using one basic calculation step. Ideally, the block accepts continuous (or fixed with a small time step) signals and outputs a signal that is fixed with a small time step. |
|
Converts a continuous input signal to a discrete signal. |
Each unit has the following capabilities.
| Capability | Memory | Unit Delay | Zero-Order Hold |
|---|---|---|---|
Initial condition setting |
Yes |
Yes |
No, because the block output at time |
Setting the calculation step |
No, because the block can only inherit the calculation step from the control block or solver used for the whole model. |
Yes |
Yes |
Support for frame-based signals |
No |
Yes |
Yes |
Support for status logging |
No |
Yes |
No |
Ports
Input
#
IN_1
—
input signal
scalar | vector | bus
Details
The input signal that the block delays for one calculation step. Defined as a scalar, vector or bus.
For more details on working with custom bus type, see here.
| Data types |
|
| Complex numbers support |
Yes |
Output
#
OUT_1
—
output signal
scalar | vector | bus
Details
The output signal, i.e. the input signal delayed by one calculation step. It is specified as a scalar, vector or bus. The output signal type corresponds to the input signal type.
For more details on working with custom bus type, see here.
| Data types |
|
| Complex numbers support |
Yes |
Parameters
Main
# Initial condition — initial value of the output signal
Details
Output signal value at the first simulation step.
| Default value |
|
| Program usage name |
|
| Tunable |
Yes |
| Evaluatable |
Yes |
#
Sample Time —
interval between calculation steps
SampleTime (real number / vector of two real numbers)
Details
Specify the interval between calculation steps as a non-negative number. To inherit a calculation step, set this parameter to -1.
| Default value |
|
| Program usage name |
|
| Tunable |
No |
| Evaluatable |
Yes |